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integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 1/24 1/17/2013 apr33a 1 / apr33a2 / apr33a3 fixed 1/ 2/ 4/ 8 message mode (c2.0) datasheet recording voice ic aplus integrated circuits inc. address: 3 f-10, no. 32, sec. 1, chenggung rd., taipei, taiw an 115, r.o.c. tel: 886-2-2782-9266 fax: 886-2-2782-9255 website : http://www.aplusinc.com.tw technology e-mail: service@aplusinc.com.tw sales e-mail: sales@aplusinc.com.tw free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 2/24 1/17/2013 features operating voltage range: 3v ~ 6.5v single chip, high quality audio/voice recording & playback solution no external ics required minimum external components user friendly, easy to use operation programming & development systems not required 170/ 340/ 680 sec. voice recording length in apr33 a1/apr33a2/apr33a3 powerful 16-bits digital audio processor. nonvolatile flash memory technology no battery backup required external reset pin. powerful power management unit very low standby current: 1ua low power-down current: 15ua supports power-down mode for power saving built-in audio-recording microphone amplifier no external opamp or bjt required easy to pcb layout configurable analog interface differential-ended mic pre-amp for low noise high quality line receiver high quality analog to digital and pwm module resolution up to 16-bits simple and direct user interface averagely 1,2,4 or 8 voice messages record & playb ack free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 3/24 1/17/2013 description todays consumers demand the best in audio/voice. t hey want crystal-clear sound wherever they are in whatever format they want to use. aplus deli vers the technology to enhance a listeners audio/voice experience. the apr33a series are powerful audio processor alon g with high performance audio analog-to-digital converters (adcs) and digital-to- analog converters (dacs). the apr33a series are a fully integrated solution offering high perfo rmance and unparalleled integration with analog input, digital processing and analog output functio nality. the apr33a series incorporates all the functionality required to perform demanding audio/v oice applications. high quality audio/voice systems with lower bill-of-material costs can be im plemented with the apr33a series because of its integrated analog data converters and full suite of quality-enhancing features such as sample-rate convertor. the apr33a series c2.0 is specially designed for si mple key trigger, user can record and playback the message averagely for 1, 2, 4 or 8 voice messag e(s) by switch, it is suitable in simple interface or need to limit the length of single message, e.g. toys, leave messages system, answering machine etc. meanwhile, this mode provides the powe r-management system. users can let the chip enter power-down mode when unused. it can effe ctively reduce electric current consuming to 15ua and increase the using time in any projects po wered by batteries. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 4/24 1/17/2013 pin configuration sop package free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 5/24 1/17/2013 pin description pin names pin no type description vddp vdd vdda vddl 8 10 18 24 positive power supply. vssp vssl vssa 5 11 17 power ground. v ldo 25 internal ldo output. v core 16 positive power supply for core. v ref 19 reference voltage. v cm 20 common mode voltage. rosc 26 input oscillator resistor input. rstb 27 input reset. (low active) srstb 28 input system reset, pull-down a resistor t o the vssl. mic+ mic- 21 22 input microphone differential input. micg 23 output microphone ground. vout2 vout1 6 7 output pwm output to drive speaker directly. /rec 12 input record mode. (low active) m0 13 input message-0. m1 14 input message-1. m2 15 input message-2. m3 9 input message-3. m4 3 input message-4. m5 4 input message-5. m6 / m sel 0 1 input message-6, message select 0. m7 / m sel 1 2 input message-7, message select 1. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 6/24 1/17/2013 typical application free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 7/24 1/17/2013 message mode in fixed 1/ 2/ 4/ 8 message mode (c2.0), user can d ivide the memory averagely for 1, 2, 4 or 8 message(s). the message mode will be applied after chip reset by the m sel 0 and m sel 1 pin. please note the message should be recorded and play ed in same message mode, we can not guarantee the message is complete after message mod e changed. for example, user recorded 8 messages in the 8-message mode, those messages can be played in 8-message mode only. if user changed to 1, 2 or 4 message mode, system will disc ard those messages. 8-message mode the memory will be divided to 8 messages averagely when both m sel 0 and m sel 1 pin float after chip reset. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 8/24 1/17/2013 4-message mode the memory will be divided to 4 messages averagely when m sel 0 pin connected to vss and m sel 1 pin float after chip reset. 2-message mode the memory will be divided to 2 messages averagely when m sel 1 pin connected to vss and m sel 0 pin float after chip reset. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 9/24 1/17/2013 1-message mode the memory will be for 1 message when both m sel 0 and m sel 1 pin connected to vss after chip reset. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 10/24 1/17/2013 record message during the /rec pin drove to v il , chip in the record mode. when the message pin (m0, m1, m2 m7) drove to v il in record mode, the chip will playback beep tone and message record starting. the message record will continue until message pin released or full of this message, and the chip will playback beep tone 2 times to indicate the m essage record finished. if the message already exist and user record again, the old ones message will be replaced. the following fig. showed a typical record circuit for 8-message mode. we connected a slide-switch between /rec pin and vss, and connected 8 tact-swit ches between m0 ~ m7 pin and vss. when the slide-switch fixed in vss side and any tact-swi tch will be pressed, chip will start message record and until the user releases the tact-switch. note: after reset, /rec and m0 to m7 pin will be pu ll-up to vdd by internal resistor. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 11/24 1/17/2013 playback message during the /rec pin drove to v ih , chip in the playback mode. when the message pin (m0, m1, m2 m7) drove from v ih to v il in playback mode, the message playback starting. the message playback will continue until message pi n drove from v ih to v il again or end of this message. the following fig. showed a typical playback circui t for 8-message mode. we connected a slide-switch between /rec and vss, and connected 8 tact-switches between m0 ~ m7 and vss. when the slide-switch fixed in float side and any t act-switch will be pressed, chip will start message playback and until the user pressed the tact-switch again or end of message. note: after reset, /rec and m0 to m7 pin will be pu ll-up to vdd by internal resistor. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 12/24 1/17/2013 voice input the apr33a series supported single channel voice in put by microphone or line-in. the following fig. showed circuit for different input methods: microphone, li ne-in and mixture of both. (a) microphone free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 13/24 1/17/2013 (b) line-in (c) microphone + line-in free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 14/24 1/17/2013 busy the micg pin will be drove to low during the messag e record or playback, and drove to high during idle or standby, user can detect micg status to kno w chip is busy or not. please note it is limited for micg pin driving curr ent. reference to i oh and i ol in section dc characteristics . if micg pin is over loading from external circuit , it will cause noise in microphone circuit. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 15/24 1/17/2013 below is a typical application. we add one led to i ndicate ic record and playback status. we use one resistor to limit current. and suggest r> 4 70 free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 16/24 1/17/2013 below transistor circuit is to get higher current, larger than i oh or i ol . free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 17/24 1/17/2013 to get best sound quality, we can use buffer or inv erter to isolate micg to avoid noise from external circuit. driving current is provided by buffer(inve rter) only. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 18/24 1/17/2013 reset apr33a series can enter standby mode when rstb pin drive to low. during chip in the standby mode, the current consumption is reduced to i sb and any operation will be stopped, user also can not execute any new operate in this mode. the standby mode will continue until rstb pin goes to high, chip will be started to initial, and playback beep tone to indicate enter idle mode. user can get less current consumption by control rs tb pin specially in some application which concern standby current. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 19/24 1/17/2013 example the apr33db is one of the simplest solutions for ac hieve fixed 1/ 2/ 4/ 8 message mode demo. the circuit board already includes the peripheral circu it which containing microphone. developers only need to notice how to connect with their developmen t environment. it can effectively decrease the time of circuit connecting & any possible mistakes. below figure shows how to connect apr33db with external key in fixed 1/ 2/ 4/ 8 message mode: free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 20/24 1/17/2013 block diagram figure 1. block diagram absolute maximum ratings symbol rating unit vdd C vss -0.3 ~ +10.0 v v in vss-0.3 < v in < vdd+0.3 v v out vss < v out < vdd v t(operating) -40 ~ +85 t(junction) -40 ~ +125 t(storage) -40 ~ +125 free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 21/24 1/17/2013 dc characteristics symbol parameter min. typ. max. unit conditions vdd operating voltage 3.0 6.5 v i sb standby current 1 a i pdn power-down current 15 20 a i op(idle) operating current (idle) 20 ma vdd = 5v i op(rec) operating current (record) 35 ma vdd = 5v i op(play) operating current (playback) 25 ma vdd = 5v v ih "h" input voltage 2.5 v v il "l" input voltage 0.6 v i vout vout current 185 ma i oh o/p high current 8 ma vdd = 5v / voh=4.5v i ol o/p low current 14 ma vdd = 5v / voh=0.5v r npio input pin pull-down resistance 300 k external floating or drive low. 1 m external drive high. r upio input pin pull-up resistance 4.7 k fs/fs frequency stability 5 % vdd = 5v 1.0v fc/fc chip to chip frequency variation 5 % also apply to lot to lot variation. free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 22/24 1/17/2013 ac characteristics symbol parameter min. typ. max. unit conditions t1 /cs setup time 100 -- -- ms vdd=5.0v t2 trigger setup time 16 -- -- ms vdd=5.0v t3 trigger hold time 16 -- -- ms vdd=5.0v t4 /cs hold time 100 -- -- us vdd=5.0v free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 23/24 1/17/2013 package information free datasheet http://
integrated circuits inc. APR33A1/apr33a2/apr33a3 ver. b 24/24 1/17/2013 history ver. b (2013/01/17) - add section busy. ver. a (2012/11/15) - original version data sheet for apr33ax c2.0. free datasheet http://

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